How this instrument works
A trace on a PCB isn't just a wire — at the speeds modern digital and RF signals run at, it behaves like a transmission line with its own characteristic impedance, determined by its geometry and the board material around it. If that impedance doesn't match what the driving circuit and receiving circuit expect (commonly 50Ω for RF, or 90-100Ω differential for many digital interfaces), part of the signal reflects back at the mismatch instead of continuing on — causing ringing, overshoot, and in bad cases outright signal failure. Matching trace impedance to the design target is routine work in board layout.
This calculator uses the IPC-2141 simplified formula for a single-ended microstrip — a trace running on the outer layer of the board, above a solid reference plane, with air (not more board material) above it. Four inputs matter: how wide the trace is, how far above the ground plane it sits (the dielectric height), how thick the copper itself is, and the dielectric constant of the board material separating trace from plane (roughly 4.2-4.6 for standard FR4). Widen the trace or move it closer to the plane and impedance drops; use a lower-er dielectric or move the trace farther from the plane and impedance rises.
This is a simplified, closed-form approximation, not a full field-solver result — real board houses commonly use 2D field solvers for tight-tolerance impedance-controlled boards, and actual fabricated impedance also depends on etch tolerances, solder mask, and copper roughness that this formula doesn't model. Treat the result as a solid first-pass estimate for stackup planning, not a guaranteed as-manufactured number.
- Enter Trace width W in mm — the copper trace's width as drawn.
- Enter Dielectric height H in mm — the distance from the trace down to the reference (ground) plane.
- Enter Trace thickness T in mm — the copper thickness (0.035mm ≈ 1oz copper, a common default).
- Enter Dielectric constant er — the board material's relative permittivity (≈4.2-4.6 for standard FR4).
- Read Characteristic impedance Z0 in ohms — compare it against your design target (commonly 50Ω single-ended).
Worked example — a 0.3mm trace on standard FR4
A 0.3mm-wide, 1oz-copper (0.035mm) trace sitting 0.2mm above the ground plane on standard FR4 (er = 4.4): Z0 = (87 / sqrt(4.4 + 1.41)) x ln(5.98 x 0.2 / (0.8 x 0.3 + 0.035)) = (87 / sqrt(5.81)) x ln(1.196 / 0.275) = 36.0937 x ln(4.3491) = 36.0937 x 1.4700 = 53.06 ohm. That lands close to the common 50 ohm single-ended design target, which is a reasonable sanity check for this stackup.
Widen the same trace to 0.5mm and thin the dielectric to 0.15mm and impedance drops noticeably: Z0 = (87/sqrt(5.81)) x ln(5.98x0.15/(0.8x0.5+0.035)) = 36.0937 x ln(0.897/0.435) = 36.0937 x 0.7237 = 26.12 ohm — both a wider trace and a closer reference plane push impedance down, as the formula predicts.
Questions
What does trace impedance actually control?
It determines how a fast-changing signal (a high-speed digital edge or an RF waveform) propagates along the trace. If the trace's characteristic impedance doesn't match the source and load impedance the circuit expects, part of the signal reflects back at the mismatch instead of continuing to the receiver — causing ringing, overshoot, or data errors on high-speed digital lines, and power loss or standing waves on RF lines. Matching trace geometry to a target impedance (commonly 50 ohm single-ended) is standard practice on any board carrying fast signals.
Why does trace width lower the impedance?
A wider trace has more capacitance to the ground plane beneath it, and characteristic impedance falls as capacitance per unit length rises (impedance is roughly proportional to 1/sqrt(C) for a lossless line). The same logic explains why moving the trace closer to the plane (a smaller dielectric height H) also lowers impedance — it increases the capacitive coupling between trace and plane.
Is this the exact impedance my fabricated board will have?
Treat it as a solid first-pass estimate, not a guarantee. The IPC-2141 formula used here is a simplified closed-form approximation; board houses building tight-tolerance impedance-controlled boards typically run a full 2D field solver against your exact stackup, and the as-manufactured trace also depends on etch tolerances, solder mask coverage, and copper surface roughness that a simplified formula doesn't capture. For a critical design, ask your fabricator for their own impedance calculation against your stackup.
What dielectric constant should I use for FR4?
Standard FR4 typically falls in the 4.2-4.6 range at the frequencies most digital designs care about, with 4.4 a commonly used default when a specific laminate's datasheet value isn't available. High-speed or RF designs often specify a lower-loss, more tightly controlled laminate instead, in which case use that material's datasheet er rather than the generic FR4 default.
Does trace thickness matter much?
It has a smaller effect than width or dielectric height, but it isn't negligible — it appears added to the effective width term (0.8W + T) in the denominator. Heavier copper (2oz, about 0.07mm, versus the common 1oz/0.035mm default) slightly lowers impedance for the same drawn width, which matters more on boards carrying higher current where heavier copper is chosen for that reason.